A 16Mb/s-to-8Gb/s 14.1-to-5.9pJ/b Source Synchronous Transceiver Using DVFS and Rapid On/Off in 65nm CMOS

📋 论文概要

该论文提出了一种采用动态电压频率缩放（DVFS）和快速开关技术的源同步收发器，在65nm CMOS工艺中实现了16Mb/s至8Gb/s的宽数据率范围，并将能效从14.1pJ/b降低至5.9pJ/b。通过DVFS根据数据率调整供电电压，结合快速开关模式，解决了传统串行链路在低数据率下能效低的问题。

💡 主要创新点

• 采用动态电压频率缩放（DVFS）技术，根据数据率动态调整供电电压，使功耗随数据率近似二次方下降，显著提升能效。
• 引入快速开关（Rapid On/Off）模式，支持突发操作，进一步降低空闲功耗，实现宽数据率范围下的高效能。
• 在65nm CMOS工艺中实现了16Mb/s至8Gb/s的宽数据率覆盖，能效从14.1pJ/b优化至5.9pJ/b。

🏷 关键词

📄 原文摘要

Seong-Joong Kim, Mrunmay Talegaonkar, Romesh Nandwana, Ahmed Elkholy, Da Wei, Timir Nandi, Pavan Kumar Hanumolu University of Illinois, Urbana-Champaign, IL Dynamic voltage and frequency scaling (DVFS) [1] and burst-mode operation [2] are two promising methods to greatly improve energy efficiency of serial links. By varying supply voltage in accordance with the desired data rate/workload, DVFS scales link power almost quadratically with data rate. Because the time constant associated with changing the output of a DC-DC converter that provides the optimal link supply voltage is on the order of several microseconds, DVFS is effective only when rate of workload variations is slow. On the other hand, burstmode communication, implemented using rapid on/off (ROO) links, linearly scales power consumption with effective data rate and is well-suited for interfaces where link inactive periods are short, on the order of few hundred nano-seconds or less.

👥 作者与机构

Guanghua Shu, Woo-Seok Choi, Saurabh Saxena,