A 16Gb/s 1 IIR + 1 DT DFE Compensating 28dB Loss with Edge-Based Adaptation Converging in 5μs

📋 论文概要

本文提出了一种结合1阶IIR DFE和1阶离散时间DFE的均衡器架构，在16Gb/s速率下成功补偿28dB信道损耗。同时，设计了一种基于边缘检测的自适应算法，实现了5μs的快速收敛且无需额外高速硬件。

💡 主要创新点

• 提出IIR DFE与离散时间DFE的组合结构，有效消除长尾后光标码间干扰。
• 采用基于边缘检测的自适应算法，实现快速收敛（5μs）并降低硬件复杂度。
• 在16Gb/s高速率下实现28dB损耗补偿，展示了低功耗高性能的均衡方案。

🏷 关键词

📄 原文摘要

I/O receivers routinely equalize ISI over 10 or more post-cursor UI. IIR DFEs are a low-power technique for canceling long post-cursor ISI tails, and have been demonstrated compensating over 20dB loss at fbit/2 up to 10Gb/s [1-5]. Equalizer adaptation is required to maintain signal integrity in time-varying channel and circuit conditions. Robust adaptation algorithms suitable for discrete-time (DT) DFEs are well-established, but there are few examples of adaptive algorithms for IIR DFEs [2,4], each exhibiting relatively slow convergence, additional highbandwidth hardware and/or requiring the input data statistics to meet specific criteria. In this work, a 16Gb/s IIR DFE is integrated into a CDR, and the adaptation algorithm makes use of signals available in a regular binary phase detector (PD) to simultaneously adapt the IIR and DT taps. The novel algorithm provides faster and more robust convergence than has been previously demonstrated for IIR

👥 作者与机构

Shayan Shahramian, Behzad Dehlaghi, Anthony Chan Carusone

University of Toronto, Toronto, ON, Canada