A 0.003mm2 1.7-to-3.5GHz Dual-Mode TimeInterleaved Ring-VCO Achieving 90-to-150kHz 1/f3 Phase-Noise Corner

📋 论文概要

本文提出了一种双模式时间交织环形压控振荡器(RVCO)，在0.003mm²的小面积上实现了1.7-3.5GHz的调谐范围，并达到了90-150kHz的1/f³相位噪声转角。通过时间交织技术，突破了传统环形振荡器相位噪声性能的限制。

💡 主要创新点

• 提出双模式时间交织环形VCO架构，通过时间交织技术有效降低相位噪声，同时保持小面积和宽调谐范围。
• 实现了90-150kHz的极低1/f³相位噪声转角，显著优于传统环形VCO，接近LC振荡器性能。
• 采用0.003mm²的超小芯片面积，适合低成本、高集成度射频系统应用。

🏷 关键词

📄 原文摘要

Instituto Superior Tecnico, Lisbon, Portugal 1 3 Ring-VCOs (RVCOs) [1] have been avoided for over a decade for highperformance RF systems due to their much lower FOM (<165dB [2]) than that of their LC counterparts from low to high frequency offsets. Yet, as the cost of ultra-scaled CMOS technologies is escalating, the small-die-area and widetuning-range advantages of RVCOs have attracted more attention recently, aiming to break the FOM limit at the system level. In [2], a type-I PLL succeeds in suppressing the RVCO phase noise (PN) by extending the loop bandwidth to 10MHz (fref/20 → fref/2), facilitating an ultra-compact (0.015mm2) frequency synthesizer for 2.4GHz WLAN. However, the type-I PLL only offers 20dB/dec phase-noise suppression for its RVCO. Thus, despite using large transistors (36/0.28μm), the 1/f3 PN corner (f1/f ) is still high (~4MHz), degrading the overall jitter performance of the PLL. This paper proposes a dual-mode time-interleaved

👥 作者与机构

Jun Yin1, Pui-In Mak1, Franco Maloberti2, Rui P. Martins1,3

University of Macau, Macau, China, 2University of Pavia, Pavia, Italy,