A 2GHz 244fs-Resolution 1.2ps-Peak-INL EdgeInterpolator-Based Digital-to-Time Converter in 28nm CMOS

📋 论文概要

该论文提出了一种基于边缘插值器的数字时间转换器（DTC），在28nm CMOS工艺下实现了2GHz工作频率、244fs分辨率和1.2ps峰值INL，解决了高速DTC在高分辨率与低非线性度之间的权衡问题。

💡 主要创新点

• 采用边缘插值器架构实现高分辨率时间量化，避免了传统延迟链的累积误差。
• 通过多级分段设计结合数字校准，在2GHz高频下达到244fs分辨率与1.2ps峰值INL的优异性能。

🏷 关键词

📄 原文摘要

Universität München, Munich, Germany 1 4 Digital-to-time converters (DTC) generate a clock with a time delay (or phase shift) based on a digital input code. They can be used in clock-and-data-recovery (CDR) circuits [1,2], in the feedback or reference path of a phase-locked loop (PLL) [3,4] or as direct phase modulators in outphasing transmitters (OT) [5]. While DTCs in PLLs often operate close to the reference oscillator frequency, CDR and OT DTCs are required to operate at frequencies in the GHz range. DTCs are often built using a multistage segmented architecture, employing separate coarse and fine delay tuning. Coarse tuning is usually implemented using multiphase generators based on delay-locked loops (DLLs) [5] or dividers [1], followed by a multiplexer (MUX).

👥 作者与机构

Sebastian Sievert1, Ofir Degani2, Assaf Ben-Bassat2,

Rotem Banin2, Ashoke Ravi3, Bernd-Ulrich Klepser1, Zdravko Boos1, Doris Schmitt-Landsiedel4 Intel, Neubiberg, Germany, 2Intel, Haifa, Israel, 3Intel, Hillsboro, OR, Technische