A 20nm 2.5GHz Ultra-Low-Power Tri-Cluster CPU Subsystem with Adaptive Power Allocation for Optimal Mobile SoC Performance

📋 论文概要

该论文介绍了一款采用20nm工艺、主频2.5GHz的超低功耗三簇CPU子系统，通过自适应功率分配技术优化移动SoC性能。为了解决片上功率精确计量问题，提出了时钟活动加法器（CAA）等新电路，实现了高效的能量管理。

💡 主要创新点

• 提出时钟活动加法器（CAA），用于精确测量开关活动功耗，实现片上功率计量。
• 采用自适应功率分配机制，在三簇CPU之间动态调整功耗，以最优方式满足移动SoC的性能和能效需求。
• 整体架构在20nm工艺下实现了2.5GHz的超低功耗运行，显著提升移动设备续航。

🏷 关键词

📄 原文摘要

C.J. Chung1, Sumanth Gururajarao1, Ping Kao2, Anand Rajagopalan1, Anirban Saha3, Amit Jain4, Ericbill Wang2, Shichin Ouyang5, Huajun Wen1, Achuta Thippana1, HsinChen Chen1, Syed Rahman1, Minh Chau1, Anshul Varma1, Brian Flachs1, Mark Peng2, Alfred Tsai2, Vincent Lin2, Ue Fu2, Wuan Kuo2, Lee-Kee Yong2, Clavin Peng2, Leo Shieh2, Jengding Wu2, Uming Ko2 MediaTek, Austin, TX, MediaTek, Hsinchu, Taiwan, 3 MediaTek, Singapore, Singapore, 4 MediaTek, Bangalore, India, 5 MediaTek, San Jose, CA Two new circuits are introduced to facilitate on-die power metering: a clock activity adder (CAA) for switching power, and a leakage monitor circuit for static power. Previously published approaches to switching power estimation involve monitoring key logic signals, which correlate to architectural and microarchitectural events and then applying scaling coefficients to each signal [4]. The approach of the CAA takes advantage of the fact that switching power is highly

👥 作者与机构

Hugh T Mair1, Gordon Gammie1, Alice Wang2, Rolf Lagerquist1,