A 65nm ReRAM-Enabled Nonvolatile Processor with 6× Reduction in Restore Time and 4× Higher Clock Frequency Using Adaptive Data Retention and Self-Write-Termination Nonvolatile Logic

📋 论文概要

本文提出了一种基于ReRAM的非易失性处理器，在65nm工艺下实现。通过自适应技术，恢复时间减少6倍，时钟频率提高4倍，解决了能量收集系统中间歇供电导致的数据丢失和性能瓶颈问题。

💡 主要创新点

• 采用ReRAM作为非易失性存储元件，实现快速状态恢复，恢复时间降低6倍。
• 通过自适应时钟频率技术，在保证可靠性的前提下将工作频率提升4倍。
• 面向能量收集应用，实现零泄漏功耗和即时开机能力。

🏷 关键词

📄 原文摘要

Zhe Yuan1, Chien-Chen Lin2, Qi Wei1, Yu Wang1, Ya-Chin King2, Chrong-Jung Lin2, Pedram Khalili3, Kang-Lung Wang3, Meng-Fan Chang2, Huazhong Yang1 Tsinghua University, Beijing, China, National Tsing Hua University, Hsinchu, Taiwan, 3 University of California, Los Angeles, CA 1 2 With the rising importance of energy efficiency, zero leakage power and instanton capability are highly desired features in energy harvesting sensors, as well as “normally off” high performance processors. However, intermittent power in such systems requires nonvolatile memory (NVM) to hold intermediate data and avoid rollbacks. Previous work has adopted FeRAM and STT-MRAM to achieve zerostandby power and fast-restore nonvolatile processors (NVPs) [1-3]. Previous NVPs, however, suffer from several drawbacks: 1) Various power interrupt periods are not considered; 2) the 2-macro memory architecture slows access speed; 3)

👥 作者与机构

Yongpan Liu1, Zhibo Wang1, Albert Lee2,3, Fang Su1, Chieh-Pu Lo2,