A 1.1µm 33Mpixel 240fps 3D-Stacked CMOS Image Sensor with 3-Stage Cyclic-Based Analogto-Digital Converters

📋 论文概要

本文提出了一款1.1μm像素、33兆像素、240fps的3D堆叠CMOS图像传感器，采用三级循环型ADC，以满足超高清电视（7,680×4,320@120Hz）对高分辨率和高帧率的需求。该传感器通过3D堆叠技术将像素阵列和ADC层分离，实现了高速度与高图像质量的平衡。

💡 主要创新点

• 采用1.1μm微像素和33Mpixel超高分辨率，结合240fps高速读出，突破了传统图像传感器的性能瓶颈。
• 首次在CMOS图像传感器中引入3级循环型ADC，在保持高转换精度的同时显著降低功耗和面积。
• 利用3D堆叠工艺将像素层与逻辑电路层垂直集成，实现了紧凑的芯片尺寸和高效的信号传输。

🏷 关键词

📄 原文摘要

Hiroshi Shimamoto1, Tomohiko Kosugi2, Sungwook Jun2, Satoshi Aoyama2, Ming-Chieh Hsu3, Yuichiro Yamashita3, Hirofumi Sumi3, Shoji Kawahito2,4 NHK Science & Technology Research Laboratories, Tokyo, Japan, Brookman Technology, Hamamatsu, Japan, 3TSMC, Hsinchu, Taiwan, 4 Shizuoka University, Hamamatsu, Japan 1 2 There is an increasing demand for high-reality video systems. The ITU-R has standardized video parameters for ultra-high-definition TV (UHDTV), and the fullspecification video signal stated in this international standard is prescribed as having a 7,680 (H) × 4,320 (V) pixel count, 120Hz frame frequency with progressive scanning, 12b tone reproduction, and wide color gamut. A 33Mpixel 120fps CMOS image sensor with a 12b column-parallel analog-to-digital converter (ADC) is reported in [1]. In addition to standard operation, higher sensitivity, smaller pixels, and a higher frame rate of 240fps or more are required for CMOS

👥 作者与机构

Toshiki Arai1, Toshio Yasue1, Kazuya Kitamura1,