⚡ 本页包含 AI 生成的分析内容，仅供参考
该论文提出了一种电阻漂移补偿（RDC）方案，用于降低多级单元相变存储器（MLC PCM）的原始误码率。实验结果表明，该方案可将原始误码率降低超过100倍，适用于存储级内存应用。
Tzu-Hsiang Su1,3, Keng-Hao Yang3, Tien-Fu Chen3, Tien-Yen Wang1, Hsiang-Pang Li1, Matthew BrightSky4, SangBum Kim4, Hsiang-Lam Lung1, Chung Lam4 Macronix International, Hsinchu, Taiwan, National Tsing Hua University, Hsinchu, Taiwan, 3 National Chiao Tung University, Hsinchu, Taiwan, 4 IBM T. J. Watson Reseach Center, Yorktown Heights, NY 1 Figure 7.3.3 demonstrates the measured impact of RDC pulses on drifted and unchanged PCM cells. The experiment first programs PCM cells to six different resistance levels (Rinit[5:0]) using ISPP by RESET. The cells are then rested for a period of time (TP2R) before measuring the cell resistance by sweeping the twostep RDC pulse current amplitude (IRDC). When TP2R<1s, RDC pulse impact is minimal because the cells have not yet drifted significantly. However, when TP2R>5000s, a prominent R-drift compensation phenomenon is observed with IRDC between 80 and 120AU. The drifted cells are able to return to their original Rinit
Win-San Khwa1,2, Meng-Fan Chang2, Jau-Yi Wu1, Ming-Hsiu Lee1,