⚡ 本页包含 AI 生成的分析内容,仅供参考
提出一种用于移动应用处理器的200mA数字低压差稳压器(LDO),采用粗-细双环路控制架构。该设计旨在减少外部电容数量,抑制PCB寄生电感引起的电源纹波问题。
Tae-Hwang Kong2, Dae-Yong Kim2, Kwang-Ho Kim2, Sang-Ho Kim2, Jae-Jin Park2, Ho-Jin Park2, Gyu-Hyeong Cho1 KAIST, Daejeon, Korea, Samsung Electronics, Hwaseong, Korea 1 2 A modern mobile application processor (AP) requires a variety of power voltage levels, which increases the number of external capacitors around the mobile AP. This is because the supply PCB routes from the power management IC (PMIC) to the AP have parasitic inductors. The parasitic inductors introduce ripples on power voltage lines. Therefore, external capacitors are required on the PCB routes between the PMIC and the mobile AP. To reduce the number of external capacitors, one power voltage level from the PMIC is converted into a variety of power voltage levels inside the mobile AP. This both reduces external capacitors as well as the number of power pins on the mobile AP and simplifies PCB routes. For such reasons, integrated low-dropout regulators (LDOs) are preferred in
Yong-Jin Lee1,2, Min-Yong Jung1, Shashank Singh2,