A 1.1V 28.6dBm Fully Integrated Digital Power Amplifier for Mobile and Wireless Applications in 28nm CMOS Technology with 35% PAE

📋 论文概要

该论文提出了一款在28nm CMOS工艺中实现的1.1V供电、28.6dBm峰值输出功率的全集成数字功率放大器，解决了移动和无线应用中高功率输出与低电压、高集成度之间的矛盾。

💡 主要创新点

• 采用全数字架构实现功率放大器，避免了传统模拟PA所需的高压电源和外部匹配网络。
• 在28nm CMOS工艺下实现了28.6dBm的峰值输出功率，同时保持1.1V的低供电电压。

🏷 关键词

📄 原文摘要

wireless applications emerge, calling for increasingly higher integration and smaller footprint, while ensuring high reliability and operation at limited supply voltages. In this context, the integration of the power amplifier (PA) is a challenge. Wireless transmission requires Watt-level peak power, which is usually achieved by means of a dedicated external PA, although monolithic integration of the PA within the radio transceiver has recently become more and more common [1-6]. In both cases, however, a dedicated PA supply voltage is usually provided, and the PA is typically operated at a higher supply voltage than that of the digital core of the transmitter to achieve the required output power level. In this work, a switched-capacitor digital PA (SCDPA) featuring 28.6dBm peak

👥 作者与机构

Antonio Passamani1, Davide Ponton1, Edwin Thaller1,

Gerhard Knoblinger1, Andrea Neviani2, Andrea Bevilacqua2 Intel, Villach, Austria University of Padova, Padova, Italy 1 2 In today’s connected world, smaller and leaner