A 28nm SoC with a 1.2GHz 568nJ/Prediction Sparse Deep-Neural-Network Engine with >0.1 Timing Error Rate Tolerance for IoT Applications

📋 论文概要

该论文提出了一款28nm SoC，集成了一个1.2GHz的稀疏深度神经网络引擎，通过Razor动态时序误差跟踪和弹性技术，实现了在>0.1时序错误率下仍能正常工作，显著降低电压裕度，能效达到568nJ/预测。解决了IoT设备中ML工作负载的能效和鲁棒性问题。

💡 主要创新点

• 采用Razor技术实现时序误差容忍，允许大幅降低电压裕度，从而提升能效。
• 设计稀疏DNN引擎架构，在高时钟频率（1.2GHz）下实现低功耗（568nJ/预测）。
• 结合动态时序误差跟踪和补偿机制，实时适应PVTA变化，确保系统可靠性。

🏷 关键词

📄 原文摘要

(IoT) devices with the capability to interpret the complex, noisy real-world data arising from sensorrich systems. Achieving sufficient energy efficiency to execute ML workloads on an edge-device necessitates specialized hardware with efficient digital circuits. Razor systems allow excessive worst-case VDD guardbands to be minimized down to the point where timing violations start to occur. By tracking the non-zero timing violation rate, process/voltage/temperature/aging (PVTA) variations are dynamically compensated as they change over time. Resilience to timing violations is achieved using either explicit correction (e.g., replay [1]), or algorithmic tolerance [2]. ML algorithms offer remarkable inherent error tolerance and are a natural fit for Razor timing violation detection without the burden of

👥 作者与机构

Paul N. Whatmough, Sae Kyu Lee, Hyunkwang Lee, Saketh Rama,

David Brooks, Gu-Yeon Wei Harvard University, Cambridge, MA Machine Learning (ML) techniques empower Internet of Things