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该论文提出了一种数字辅助CMOS WiFi 802.11ac/11ax前端模块,通过数字预失真和包络跟踪等技术,在20dBm输出功率下实现了12%的PA效率,解决了传统III-V或SiGe FEM成本高、效率低的问题。
James F. Wang1, Osama Shanaa1 MediaTek, San Jose, CA, 2MediaTek, Kent, United Kingdom 1 Front-end modules (FEM) typically employ expensive III-V or SiGe technologies to provide relatively higher PA output power and lower LNA noise figure (NF) for larger distance coverage compared to what can be achieved in a CMOS transceiver SoC [1]. The WiFi FEM is typically designed as a standalone entity using linear and inefficient PA topologies, such as Class-A/AB, resulting in an FEM not taking advantage of the full capability of the transceiver SoC. Furthermore, due to the stringent EVM requirement, almost 10dB back-off from Psat is required, resulting in a poor PAE of <7% at +20dBm Pout for the conventional Class-A/AB topologies regardless of device technology [1-3]. The CMOS FEM in Fig. 17.1.1 addresses the above issues and achieves performance comparable to that of GaAs/SiGe FEM but offers higher efficiency while using the full capability of the transceiver to
Yuen Hui Chee1, Fatih Golcuk1, Toru Matsuura1, Christopher Beale2,