⚡ 本页包含 AI 生成的分析内容,仅供参考
该论文提出一种鲁棒的分数N频率合成器架构,实现了0.25倍参考频率的环路带宽,同时将ΔΣ调制器在fREF/2处的噪声峰值降低62dB,解决了传统合成器带宽受限的问题。
The loop bandwidth of conventional RF fractional-N synthesizers has been limited to about fREF/10 despite the use of methods that suppress the ΔΣ-modulator quantization noise [1-4]. The trade-off between the loop bandwidth and the ΔΣ noise peaking becomes more serious if the synthesizer employs a ring oscillator to achieve multiband operation, less unwanted coupling, and greater design flexibility than LC oscillators [5]. This paper proposes a simple, robust fractional-N architecture that reduces the ΔΣ noise peak at fREF/2 by 62dB without significant bandwidth penalty. The synthesizer can thus incorporate a ring oscillator while achieving a performance commensurate with WiFi receivers and transmitters. We wish to suppress the ΔΣ noise before it reaches the first potentially nonlinear stage in the loop, preferably using a single dual-modulus feedback divider. If this divider one-bit output is applied to an FIR filter with a transfer function of the form
Long Kong, Behzad Razavi
University of California, Los Angeles, CA