← 返回论文列表 📄 下载原文 PDF  ISSCC 2017 · 21.7
ISSCC 2017Session 21 · SMART SOCS FOR INNOVATIVE APPLICATIONSDigital Processors65nm CMOS

2pJ/MAC 14b 8×8 Linear Transform Mixed-Signal Spatial Filter in 65nm CMOS with 84dB Interference Suppression

⚡ 本页包含 AI 生成的分析内容,仅供参考

📋 论文概要

该论文提出了一种基于混合信号处理的线性变换空间滤波器,实现了8×8矩阵向量乘法,在65nm CMOS工艺中达到2pJ/MAC的能效,并具有84dB的干扰抑制能力。解决了传统模拟矩阵乘法器分辨率低、干扰抑制不足的问题,适用于源分离和定位等任务。

💡 主要创新点

核心指标
2pJ/MAC, 14b分辨率, 84dB干扰抑制
工艺节点
65nm CMOS
重要性
发表年份
ISSCC 2017

🏷 关键词

混合信号矩阵向量乘法空间滤波

📄 原文摘要

machine learning (ML) and the internet-of-things (IoT) have resulted in a renewed interest in analog matrix-vector multiplication (MvM) accelerators [1-3]. Classification based tasks have exploited low-to-medium resolution multiplication and accuracy boosting algorithms in order to compensate for the reduced resolution. Complementing classification, tasks like source separation and localization have diverse applications ranging from signal conditioning in communication [4] and ultrasound to electroencephalography (EEG) [5] source localization and spike sorting, and greatly benefit from similar algorithms. However, due to their lower resolution and limited channel count previously developed systems cannot be directly applied to this task. High-resolution analog

👥 作者与机构

Siddharth Joshi1, Chul Kim1, Sohmyung Ha2, Yu Mike Chi3, Gert Cauwenberghs1

University of California, San Diego, CA New York University, Abu Dhabi, United Arab Emirates 3 Cognionics, San Diego, CA 1 2 Advances in

分类:Digital Processors · 年份:ISSCC 2017