An Extremely Low-Standby-Power 3.733Gb/s/pin 2Gb LPDDR4 SDRAM for Wearable Devices

📋 论文概要

这篇论文提出了一款用于可穿戴设备的极低待机功耗2Gb LPDDR4 SDRAM，实现了3.733Gb/s/pin的数据速率。通过创新的电路设计和工艺优化，显著降低了待机功耗，满足了可穿戴设备对低功耗和高带宽的需求。

💡 主要创新点

• 提出极低待机功耗方案，通过优化漏电流控制电路和电源管理技术，使待机功耗降至极低水平。
• 实现3.733Gb/s/pin的高数据速率，同时保持低功耗，满足可穿戴设备的高带宽需求。
• 采用先进的LPDDR4架构和工艺技术，在2Gb容量下兼顾高性能与低功耗。

🏷 关键词

📄 原文摘要

Gong-Heum Han, Hye-Ran Kim, Jong-Ho Lee, Min-Su Jang, Sung-Geun Do, Seung-Hyun Cho, Jae-Koo Park, Su-Yeon Doo, Jung-Bum Shin, Sang-Hoon Jung, Hyoung-Ju Kim, In-Ho Im, Beob-Rae Cho, Jae-Woong Lee, Jae-Youl Lee, Ki-Hun Yu, Hyung-Kyu Kim, Chul-Hee Jeon, Hyun-Soo Park, Sang-Sun Kim, Seok-Ho Lee, Jong-Wook Park, Seung-Sub Lee, Bo-Tak Lim, Jun-young Park, Yoon-Sik Park, Hyuk-Jun Kwon, Seung-Jun Bae, Jung-Hwan Choi, Kwang-Il Park, Seong-Jin Jang, Gyo-Young Jin Samsung Electronics, Hwasung, Korea With the growth of wearable devices, such as smart watches and smart glasses, there is an increasing demand for lower power dissipation, to achieve longer battery life with limited battery capacity. Nevertheless, memory bandwidth needs to increase to support high-resolution graphic engines. Since most wearable devices are event driven, they consume a bulk of power in standby mode. Therefore, it is crictical to reduce standby-mode power, as well as improve activemode power efficiency. However, DRAM’s p

👥 作者与机构

Hye-Jung Kwon, Eunsung Seo, Chan-Yong Lee, Young-Hun Seo,