A 0.6V 4.266Gb/s/pin LPDDR4X Interface with AutoDQS Cleaning and Write-VWM Training for Memory Controller

📋 论文概要

本文针对第二代LPDDR4X内存接口，提出了一种在0.6V低电压下实现4.266Gb/s/pin高速数据传输的接口设计。通过自动DQS清洗(AutoDQS Cleaning)和写VWM训练(Write-VWM Training)技术，解决了信号完整性问题和写入时序优化，实现了更低的功耗和更高的性能。

💡 主要创新点

• 提出了自动DQS清洗技术，消除DQS信号上的噪声，改善接收端信号质量。
• 提出了写VWM训练技术，优化写入数据有效的窗口，提高写入时序余量。
• 在0.6V超低电压下实现了4.266Gb/s/pin的数据速率，兼顾低功耗与高带宽。

🏷 关键词

📄 原文摘要

Kyounghoi Koo, Jongryun Choi, Yoonjee Nam, Sangsoo Park, Hyungkweon Lee, Eunsu Kim, Sukhyun Jung, Kwanyeob Chae, Suho Kim, Sanghune Park, Sanghyun Lee, Sungho Park Samsung Electronics, Hwasung, Korea Although the LPDDR4 interface has enabled industry requirements, such as low power consumption and high bandwidth, additional evolution of the current LPDDR4 performance is expected. To respond to the need for more power efficient devices with higher bandwidth, a 2nd generation LPDDR4 (referred to as LPDDR4X), with extreme low power and extended performance, has been developed in this work. In the controller, the output drivers for data signal (DQ) and data strobe signal (DQS) dominate the power consumption. An efficient method to reduce the output driver power is to reduce the supply voltage (VDDQ)

👥 作者与机构

Soo-Min Lee, Jihun Oh, Jinho Choi, Seokkyun Ko, Daero Kim,