⚡ 本页包含 AI 生成的分析内容，仅供参考
本文介绍了一款集成在10nm FinFET工艺中的异构三簇十核CPU复合体，最高工作频率达2.8GHz。通过优化电源分配网络（PDN），有效提升了移动SoC的性能和能效。
Sumanth Gururajarao1, Rolf Lagerquist1, Jin Son1, Gordon Gammie1, Gordon Lin2, Achuta Thippana1, Kent Li1, Manzur Rahman1, Wuan Kuo2, David Yen2, Yi-Chang Zhuang2, Ue Fu2, Hung-Wei Wang2, Mark Peng3, Cheng-Yuh Wu2, Taner Dosluoglu4, Anatoly Gelman4, Daniel Dia2, Girishankar Gurumurthy2, Tony Hsieh2, WX Lin2, Ray Tzeng2, Jengding Wu2, CH Wang2, Uming Ko2 MediaTek, Austin, TX MediaTek, Hsinchu, Taiwan 3 MediaTek, San Jose, CA 4 Endura Technologies, San Diego, CA 1 2 This paper describes logic and circuit design features of a heterogeneous tricluster deca-core CPU complex incorporated into a 10nm FinFET mobile SoC for smartphone applications. Similar to Helio X20 [1], the Deca-Core compute function contains three separate clusters of ARMv8a CPUs. The high-performance (HP) cluster is updated to incorporate the most power-efficient out-of-order Cortex-A73 CPU, operating at max frequency of 2.8GHz. In X20, the low-power
Hugh Mair1, Ericbill Wang2, Alice Wang2, Ping Kao2, Yuwen Tsai2,