← 返回论文列表 📄 下载原文 PDF  ISSCC 2017 · 4.6
ISSCC 2017Session 4 · IMAGERSImage Sensors像素层:90nm CIS工艺;DRAM层:40nm工艺;逻辑层:28nm工艺

A 1/2.3inch 20Mpixel 3-Layer Stacked CMOS Image Sensor with DRAM

⚡ 本页包含 AI 生成的分析内容,仅供参考

📋 论文概要

本文提出了一款1/2.3英寸20M像素的三层堆叠CMOS图像传感器,通过集成DRAM实现了高速数据读出和全局快门功能,解决了高像素手机相机与单反相机在帧率和高速成像方面的差距。

💡 主要创新点

核心指标
20M像素,1/2.3英寸光学格式,全高清240fps
工艺节点
像素层:90nm CIS工艺;DRAM层:40nm工艺;逻辑层:28nm工艺
重要性
发表年份
ISSCC 2017

🏷 关键词

三层堆叠CMOS图像传感器DRAM全局快门高速读出

📄 原文摘要

Taku Umebayashi1, Hiroshi Takahashi1, Kazuo Taniguchi1, Masami Kuroda1, Hiroshi Sumihiro1, Koji Enoki1, Takatsugu Yamasaki2, Katsuya Ikezawa1, Atsushi Kitahara1, Masao Zen1, Masafumi Oyama1, Hiroki Koga1, Hidenobu Tsugawa1, Tomoharu Ogita1, Takashi Nagano1, Satoshi Takano3, Tetsuo Nomoto1 Sony Semiconductor Solutions, Atsugi, Japan Sony Semiconductor Manufacturing, Atsugi, Japan 3 Sony LSI Design, Atsugi, Japan 1 2 In recent years, the performance of cellphone cameras has improved, and is becoming comparable to that of SLR cameras. However, the big difference between cellphone cameras and SLR cameras is the distortion due to the rolling exposure of CMOS image sensors (CISs) because cellphone cameras cannot have a mechanical shutters [1]. In addition to this technical problem, the demands for high quality in dark situations and for movies are increasing. Frame-level signal processing can solve these problems, but previous generations of CIS could not

👥 作者与机构

Tsutomu Haruta1, Tsutomu Nakajima1, Jun Hashizume1,

分类:Image Sensors · 年份:ISSCC 2017