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ISSCC 2018Session 12 · DRAMMemory

A 1.2V 64Gb 341GB/s HBM2 Stacked DRAM with Spiral Point-to-Point TSV Structure and Improved Bank Group Data Control

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📋 论文概要

本文提出了一款1.2V 64Gb HBM2堆叠DRAM,采用螺旋点对点TSV结构和改进的bank group数据控制,实现了341GB/s的高带宽,解决了传统DIMM内存带宽受限的问题。

💡 主要创新点

核心指标
341GB/s bandwidth, 64Gb capacity, 1.2V operation
重要性
发表年份
ISSCC 2018

🏷 关键词

HBM2堆叠DRAMTSV高带宽银行组数据控制

📄 原文摘要

Heat Bit Park, Chunseok Jeong, Myeong-Jae Park, Seung Geun Baek, Seokwoo Choi, Byung Kuk Yoon, Young Jae Choi, Kyo Yun Lee, Daeyong Shim, Jonghoon Oh, Jinkook Kim, Seok-Hee Lee SK hynix, Gyeonggi, Korea With the recent increasing interest in big data and artificial intelligence, there is an emerging demand for high-performance memory system with large density and high data-bandwidth. However, conventional DIMM-type memory has difficulty achieving more than 50GB/s due to its limited pin count and signal integrity issues. High-bandwidth memory (HBM) DRAM, with TSV technology and wide IOs, is a prominent solution to this problem, but it still has many limitations: including power consumption and reliability. This paper presents a power-efficient structure of TSVs with reliability and a cost-effective HBM DRAM core architecture. HBM’s major obstacle for achieving high bandwidth and low power is the heavy

👥 作者与机构

Jin Hee Cho, Jihwan Kim, Woo Young Lee, Dong Uk Lee, Tae Kyun Kim,

分类:Memory · 年份:ISSCC 2018