⚡ 本页包含 AI 生成的分析内容，仅供参考
本文提出了一种50MHz带宽的连续时间ΔΣ调制器，通过动态误差校正技术解决了多比特反馈DAC中的符号间干扰问题，实现了79.8dB SNDR和95.2dB SFDR。该设计在保持高能效的同时满足了蜂窝通信的带宽需求。
MediaTek, Woburn, MA 1 2 Continuous-time ΔΣ modulators (CTDSMs) are widely used in cellular handsets due to their power efficiency and inherent anti-aliasing characteristics. To achieve demanding cellular bandwidth requirements while maintaining good power efficiency, multi-bit feedback is typically used. This approach provides benefits such as lower OSR, relaxed loop filter requirements, and reduced jitter sensitivity. However, at multi-GHz clock rates, dynamic errors introduced by inter-symbol interference (ISI) in a multi-bit feedback DAC become pronounced [1-2], thereby degrading SFDR and reducing blocker tolerance. Several methods of minimizing ISI have been previously reported; however, they require complex circuitry and introduce significant excess loop delay (ELD) [1-2], or require a single-bit RZ DAC
Tao He1, Michael Ashburn2, Stacy Ho2, Yi Zhang1, Gabor Temes1
Oregon State University, Corvallis, OR