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ISSCC 2018Session 15 · RF PLLsRF & Wireless

A Digital Frequency Synthesizer with Dither-Assisted Pulling Mitigation for Simultaneous DCO and Reference Path Coupling

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📋 论文概要

本文提出了一种数字频率合成器,通过抖动辅助的拉拽抑制技术,同时处理了数控振荡器和参考路径的耦合问题,有效减轻了多无线电平台中注入拉拽对PLL性能的影响。该设计解决了高速无线收发器中由于功率放大器或邻近PLL干扰导致的频率合成器性能退化难题。

💡 主要创新点

重要性
发表年份
ISSCC 2018

🏷 关键词

数字频率合成器注入拉拽抑制抖动辅助DCO耦合参考路径耦合

📄 原文摘要

Injection pulling on frequency synthesizers has become a critical design challenge for high-performance wireless transceivers, especially in highly integrated multiradio platforms, imposing stringent constraints on system-level frequency planning. For instance, the oscillator of the victim phase-locked loop (PLL) can be disturbed by the power-amplifier (PA) output or other nearby PLLs when their fundamental or harmonic frequency components are close to the victim PLL carrier frequency. Although the aggressor waveform in most cases is known a priori, the coupling path and mechanism (electric or magnetic) is complex and varying over time and operating conditions. Hence, the transfer function of the coupling path cannot be predetermined or reliably compensated with foreground calibration. Therefore, recent works [1-4] have proposed adaptive techniques that track the transfer function in the background. However, they only focus on pulling

👥 作者与机构

Cheng-Ru Ho, Mike Shuo-Wei Chen

University of Southern California, Los Angeles, CA

分类:RF & Wireless · 年份:ISSCC 2018