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ISSCC 2018Session 18 · ADAPTIVE CIRCUITS AND DIGITAL REGULATORSDigital Circuits

Droop Mitigation Using Critical-Path Sensors and an On-Chip Distributed Power Supply Estimation Engine in the z14TM Enterprise Processor

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📋 论文概要

该论文针对企业服务器处理器在高频高功耗下的电源噪声问题,提出了一种结合关键路径传感器和片上分布式电源估计引擎的电压跌落缓解方案。通过实时检测负载变化并动态调整电压,有效降低了电源噪声对处理器性能的影响。

💡 主要创新点

重要性
发表年份
ISSCC 2018

🏷 关键词

电压跌落缓解关键路径传感器电源估计引擎自适应电压调节企业服务器处理器

📄 原文摘要

Preetham Lobo3, Richard Rizzolo4, Tobias Webel2, Pawel Owczarczyk4, Alper Buyuktosunoglu1, Ramon Bertran1, David Hui4, Susan M. Eickhoff4, Michael Floyd5, Gerard Salem6, Sean Carey4, Stelios G. Tsapepas4, Phillip J. Restle1 IBM Research, Yorktown Heights, NY; 2IBM STG, Boeblingen, Germany 3 IBM STG, Bangalore, India; 4IBM STG, Poughkeepsie, NY; 5IBM STG, Austin, TX 6 IBM STG, Essex Junction, VT 1 Enterprise server processor designs, which operate at extreme high frequencies and power envelopes, depend critically on power supply noise mitigation techniques. With supply voltage scaling, very high current draws, and broad usage of clock gating, advanced solutions are needed for next-generation products to minimize droop mitigation response time, which can be defined as the latency from when a dangerous droop begins until a countermeasure is effective. In this paper, we present a suite of new noise mitigation techniques that have

👥 作者与机构

Christos Vezyrtzis1, Thomas Strach2, Pierce I-Jen Chuang1,

分类:Digital Circuits · 年份:ISSCC 2018