"Zeppelin": An SoC for Multichip Architectures

📋 论文概要

本文介绍了AMD的下一代SoC“Zeppelin”，采用GLOBALFOUNDRIES 14nm LPP FinFET工艺，集成超过4.8B晶体管，包含高性能Zen x86核心、缓存、内存控制器、PCIe/SATA等IO控制器以及南桥芯片组功能。该SoC专为多芯片架构设计，可灵活用于服务器、桌面等多个市场，解决了高性能计算中的多芯片互联和系统集成问题。

💡 主要创新点

• 采用多芯片架构设计的SoC，支持多种产品和封装，实现灵活的系统集成。
• 集成高性䏜AMD Zen核心及完整的IO和芯片组功能，在14nm工艺上实现超大规模晶体管集成（超过4.8B）。
• 通过优化的片上互联和多芯片封装技术，提升了跨芯片通信效率，降低了系统复杂度。

🏷 关键词

📄 原文摘要

AMD, Fort Collins, CO 1 2 Codenamed “Zeppelin”, AMD’s next-generation System-on-a-Chip (SoC) was designed for use in multiple products and packages in multiple markets, including server, mainstream PC desktop, and high-end desktop. Utilizing GLOBALFOUNDRIES’ 14nm LPP FinFET process technology, the “Zeppelin” SoC has over 4.8B transistors. It contains high-performance AMD x86 cores codenamed “Zen” [1][2], caches, memory controllers, PCIe®, SATA, and other IO controllers, and integrated x86 southbridge chipset capabilities. All these functions are connected on the SoC and between multichip packages and multi-socket systems by AMD Infinity Fabric. The “Zeppelin” SoC was architected with leadership server capabilities as the top priority, but retained features in the single “Zen”-based SoC to support other complementary markets as well: • Server market: 4-chip SP3 package with 8 DDR4 channels and 128 PCIe®

👥 作者与机构

Noah Beck1, Sean White1, Milam Paraschou2, Samuel Naffziger2

AMD, Boxborough, MA