A 4-to-16GHz Inverter-Based Injection-Locked Quadrature Clock Generator with Phase Interpolators for Multi-Standard I/Os in 7nm FinFET

📋 论文概要

该论文提出了一种4-16GHz基于逆变器的注入锁定正交时钟发生器，集成了相位插值器，用于多标准I/O接口。通过电压调节器抑制电源噪声并跟踪控制电压，实现了宽频率范围和有效的相位噪声抑制，解决了多标准I/O中对宽频率范围低抖动时钟的需求。

💡 主要创新点

• 采用基于逆变器的注入锁定环形振荡器（ILRO）实现4-16GHz的宽频率范围，覆盖多个频带。
• 集成相位插值器产生正交时钟，并利用电压调节器跟随控制电压抑制电源噪声，提高稳定性。
• 实现了大于±10%目标频率的锁定范围，降低了粗调频率DAC的分辨率要求。

🏷 关键词

📄 原文摘要

suppress the supply noise, a voltage regulator is used to regulate the ILRO supply, Vreg_ILRO, which tracks Vctrl. Stanley Chen, Lei Zhou, Ian Zhuang, Jay Im, Didem Melek, Jinyung Namkoong, Mayank Raj, Jaewook Shin, Yohan Frans, Ken Chang The measured ILRO free-running frequencies over all three bands are shown in Fig. 25.1.3. The locking range indicates >+/-10% of target frequencies which relaxes the resolution specification of the coarse FTL DAC. The phase noise of the free-running ILRO, and the quadrature-locked ILRO demonstrates the effective phase noise suppression from injection locking and the fine analog QLL, showing the phase noise of -136.22dBc/Hz and -137.9dBc/Hz at 10MHz and 1GHz offset, when characterized using a clean off-chip clock at 16GHz. The integrated RJ from 100KHz to 8GHz of the ILRO is 105fsrms. The transient I/Q clock waveforms from the oscilloscope show less than 1° I/Q phase error at 16GHz.

👥 作者与机构

attenuating the detected phase error signals. The outputs, Vdet_p and Vdet_n, are, averaged out by the V-to-I converter and the loop filter to generate Vctrl. To