A 92dB Dynamic Range Sub-μVrms-Noise 0.8μW/ch Neural-Recording ADC Array with Predictive Digital Autoranging

📋 论文概要

该论文提出了一种用于神经记录的低功耗ADC阵列，采用预测数字自动范围控制技术，实现了92dB动态范围和亚微伏RMS噪声，每通道功耗仅0.8μW。解决了神经信号记录中高动态范围与低功耗之间的矛盾。

💡 主要创新点

• 提出预测数字自动范围控制（Predictive Digital Autoranging）技术，通过数字预测状态变量动态调整ADC范围，降低功耗并提高动态范围。
• 采用差分分段6b+6b DAC结构，使用2fF单位电容的定制阵列，并引入4%更大的桥接电容，实现高精度和低功耗。
• 两级比较器采用电流饥饿预放大，决策时间1.5-2μs，适应低电压低功耗神经信号记录需求。

🏷 关键词

📄 原文摘要

center left). A two-stage comparator (Fig. 29.6.2 top right) performs 1b quantization. Decision time ranges from 1.5 to 2μs depending on input amplitude, dominated by capacitive loading (CT = 20fF) of the first-stage current-starved (IC = 20nA) pre-amplifier. Each of two differential segmented 6b+6b DACs is implemented with two 64-element custom arrays of 2fF unit capacitors C0, bridged by 4% larger capacitor C0’ (Fig. 29.6.2 bottom left). Timing of the two-phase updates in the digital prediction state variable p is triggered by initiation and settling of the comparator output (Fig. 29.6.2 bottom right). University of California, San Diego, La Jolla, CA High-density multi-channel neural recording is critical to driving advances in neuroscience and neuroengineering through increasing the spatial resolution and dynamic range of brain-machine interfaces. Neural-signal-acquisition ICs have conventionally been designed composed of two distinct functional blocks per

👥 作者与机构

Chul Kim, Siddharth Joshi, Hristos Courellis, Jun Wang, Cory Miller, Gert Cauwenberghs