⚡ 本页包含 AI 生成的分析内容，仅供参考
该论文提出了一款采用28nm bulk CMOS工艺的28GHz双极化24通道相控阵收发器，用于5G用户设备和基站，解决了低成本、高输出功率和效率的问题。
G. Liu1, T. Segoria1, J. Lerdworatawee1, J. W. Park1, H-C. Park2, H. Hedayati3, D. Lu1, P. Monat1, K. Douglas1, V. Aparin1 Qualcomm, San Diego, CA now with Samsung Electronics, Suwon, Korea 3 now with Atlazo, San Diego, CA 1 2 Developing next-generation cellular technology (5G) in the mm-wave bands will require low-cost phased-array transceivers [1]. Even with the benefit of beamforming, due to space constraints in the mobile form-factor, increasing TX output power while maintaining acceptable PA PAE, LNA NF, and overall transceiver power consumption is important to maximizing link budget allowable path loss and minimizing handset case temperature. Further, the phased-array transceiver will need to be able to support dual-polarization communication. An IF interface to the analog baseband is desired for low power consumption in the handset or user equipment (UE) active antenna and to enable use of arrays of
J. D. Dunworth1, A. Homayoun1, B-H. Ku1, Y-C. Ou1, K. Chakraborty1,