⚡ 本页包含 AI 生成的分析内容，仅供参考
该论文提出了一款4通道、1.25至28.05Gb/s的多标准收发器，采用14nm FinFET工艺，实现了6pJ/b的能效和40dB的信道损耗补偿能力。它解决了高速串行接口中信道损伤瓶颈和多标准兼容性问题，并支持独立的发送/接收速率。
Jennifer Pham, Kamran Farzan, Dominic Diclemente, Marcus van Ierssel, William Song, Saman Asgaran, Chris Holdenried, Saman Sadr Rambus, Toronto, Canada The scaling of CMOS technology together with continued innovations in circuit and system design techniques is fueling a rising demand for increasingly high throughput serial data interfaces. However, advances in CMOS technology have little impact on channel performance, making channel impairments a bottleneck in wireline links. Furthermore, links are typically designed to cover multiple standards and are expected to operate over a wide range of data rates, making their design challenging [1-5]. This work presents a 4-lane 1.25-28.05Gb/s transceiver in 14nm FinFet technology. We measure a bit error rate (BER) lower than 1e-15 with a channel loss of 40dB at 28.05Gb/s. An overview of this design is shown in Fig. 6.3.1. It includes four 28.05Gb/s lanes
Mohammad Sadegh Jalali, Mohammad Hossein Taghavi, Angus Mclaren,