A 43pJ/Cycle Non-Volatile Microcontroller with 4.7µs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience Techniques

📋 论文概要

该论文提出了一种非易失性微控制器，集成了2.3位/单元的电阻式RAM，实现了4.7微秒的关断/唤醒时间，每周期能耗仅为43皮焦，解决了物联网等应用中低能耗和快速启动的关键问题。

💡 主要创新点

• 采用2.3位/单元电阻式RAM实现高密度非易失存储，降低芯片面积和成本。
• 实现4.7微秒的快速关断/唤醒时间，显著减少待机功耗，适用于能量受限的边缘设备。
• 整体微控制器每周期能耗仅43皮焦，达到超低功耗水平，适合物联网和计算集群应用。

🏷 关键词

📄 原文摘要

William Hwang1, Seungbin Jeong1, Haitong Li1, Pulkit Tandon1, Elisa Vianello2, Pascal Vivet2, Etienne Nowak2, Mary K. Wootters1, H.-S. Philip Wong1, Mohamed M. Sabry Aly3, Edith Beigne2, Subhasish Mitra1 Stanford University, Stanford, CA CEA-LETI-MINATEC, Grenoble, France 3 Nanyang Technological University, Singapore, Singapore 1 2 Non-volatility is emerging as an essential on-chip memory characteristic across a wide range of application domains, from edge nodes for the Internet of Things (IoT) to large computing clusters. On-chip non-volatile memory (NVM) is critical for lowenergy operation, real-time responses, privacy and security, operation in unpredictable environments, and fault-tolerance [1]. Existing on-chip NVMs (e.g., Flash, FRAM, EEPROM) suffer from high read/write energy/latency, density, and integration challenges [1]. For example, an ideal IoT edge system would employ fine-grained temporal power gating (i.e., shutdown) between active modes.

👥 作者与机构

Tony F. Wu1, Binh Q. Le1, Robert Radway1, Andrew Bartolo1,