⚡ 本页包含 AI 生成的分析内容，仅供参考
该论文提出了一种基于噪声耦合辅助的Sturdy MASH结构的连续时间ΔΣ调制器，采用1.5b/4b量化器组合，在28nm CMOS工艺下实现了76.6dB SNDR、50MHz带宽和29.2mW功耗，解决了宽带高分辨率模数转换中的能效问题。
Rui P. Martins1,3, Maurits Ortmanns2 University of Macau, Macau, China, University of Ulm, Ulm, Germany 3 Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 The demands for wider cellular bandwidth (BW) drive the development of continuous time (CT) ΔΣ modulators (DSMs). Oversampling ratio (OSR) is generally restricted due to high signal BW. To obtain an adequate resolution while maintaining good power efficiency, CT DSMs generally need to achieve an aggressive noise shaping and employ a multibit quantizer (QTZ) [1-3]. Though multibit operation requires a highly linear feedback (FB) DAC, dictating sophisticated linearization techniques [1-3]. Multi-stage noise-shaping (MASH) topologies can be employed to increase the order and they can apply multibit quantization only in the latter stages, where linearity requirements are highly relaxed. However, MASH DSMs suffer from quantization noise (QN) leakage due
Liang Qi1, Ankesh Jain2, Dongyang Jiang1, Sai-Weng Sin1,