A 72.6dB-SNDR 100MHz-BW 16.36mW CTDSM with Preliminary Sampling and Quantization Scheme in Backend Subranging QTZ

📋 论文概要

该论文提出了一种具有预采样和量化方案的连续时间ΔΣ调制器（CTDSM），通过在后端采用子范围量化器实现了72.6dB SNDR、100MHz带宽和16.36mW功耗，解决了宽带宽移动通信ADC中高能效与低噪声密度的需求。

💡 主要创新点

• 提出预采样和量化方案，在CTDSM后端结合子范围量化器，降低了量化器功耗并提高了线性度。
• 通过子范围量化技术实现了多比特量化，在不增加过多功耗的情况下提升了调制器的动态范围和稳定性。

🏷 关键词

📄 原文摘要

Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 Driven by great demands for high data transfer rates in mobile communications, ADCs require wide bandwidths with low noise density and power consumption. The continuous-time ΔΣ modulator (CTDSM) is a suitable candidate for such applications as it has a simple slew rate requirement and inherently contains an anti-aliasing function. To satisfy the wide bandwidth (~100MHz for LTE-A) and simultaneously maintain the energy efficiency of the CTDSM, a multi-bit quantizer (QTZ) is often utilized that relaxes the OSR, jitter and loop filter stability. On the other hand, new design issues, such as DAC nonlinearity and high power consumption in the data feedback and QTZ, rise with large numbers of bits in the QTZ. While the DAC mismatch can be suppressed by calibrations [1,2] and the number of feedback DACs can be reduced to just one with feedforward [3] or

👥 作者与机构

Wei Wang1, Chi-Hang Chan1, Yan Zhu1, Rui P. Martins1,2

University of Macau, Macau, China