← 返回论文列表 📄 下载原文 PDF  ISSCC 2019 · 2.3
ISSCC 2019Session 2 · PROCESSORSDigital Processors

An Energy-Efficient Configurable Lattice Cryptography Processor for the Quantum-Secure Internet of Things

⚡ 本页包含 AI 生成的分析内容,仅供参考

📋 论文概要

该论文设计了一款能量高效、可配置的格密码处理器,用于量子安全的物联网场景。它解决了传统公钥密码(如RSA和ECC)在量子计算威胁下的安全问题,通过硬件加速实现格密码算法的高效执行。

💡 主要创新点

重要性
发表年份
ISSCC 2019

🏷 关键词

格密码量子安全物联网能量高效可配置处理器

📄 原文摘要

Indian Institute of Technology Delhi, New Delhi, India 1 2 Modern public key protocols, such as RSA and elliptic curve cryptography (ECC), will be rendered insecure by Shor’s algorithm [1] when large-scale quantum computers are built. Therefore, cryptographers are working on quantum-resistant algorithms, and lattice-based cryptography has emerged as a prime candidate

👥 作者与机构

Utsav Banerjee1, Abhishek Pathak2, Anantha P. Chandrakasan1

Massachusetts Institute of Technology, Cambridge, MA

分类:Digital Processors · 年份:ISSCC 2019