A 128b AES Engine with Higher Resistance to Power and Electromagnetic Side-Channel Attacks Enabled by a Security-Aware Integrated All-Digital Low-Dropout Regulator

📋 论文概要

该论文提出一种利用安全感知的集成电压调节器技术，增强128位AES引擎对功耗和电磁侧信道攻击的抵抗能力。通过并行与串行数据路径的AES引擎实现，显著提升了安全性。

💡 主要创新点

• 首次采用安全感知的集成电压调节器（IVR）同时提升功耗和电磁侧信道攻击的抵抗性
• 针对并行（128位）和串行（8位）两种AES架构进行优化，验证了方案的有效性

🏷 关键词

📄 原文摘要

information leakage through power consumption and electromagnetic (EM) emissions from cryptographic engines to uncover secret keys. Integrated inductive voltage regulators (IVR) with a randomized control loop [1] or switching frequency [2], and random voltage dithering [3] have demonstrated improved power side-channel analysis (PSCA) resistance. Simulation studies have shown PSCA resistance via shunt linear regulators [4]. This paper demonstrates improved power and EM SCA resistance of standard (unprotected) 128b AES engines with parallel (P-AES, 128b) and serial (S-AES, 8b) datapaths via an on-die security-aware all-digital series low-dropout (DLDO) regulator, commonly used for fine-grain SoC power management. The security-aware DLDO improves SCA resistance using control-loop induced

👥 作者与机构

Arvind Singh1, Monodeep Kar2, Sanu Mathew2, Anand Rajan2, Vivek De2, Saibal Mukhopadhyay1

Georgia Institute of Technology, Atlanta, GA Intel, Hillsboro, OR 1 2 Side channel attacks (SCA) exploit data-dependent