A 3.2GS/s 10 ENOB 61mW Ringamp ADC in 16nm with Background Monitoring of Distortion

📋 论文概要

本文提出了一种基于环形放大器（ringamp）的3.2GS/s 10 ENOB ADC，采用36个环形放大器实现高带宽和高线性度，功耗仅61.3mW，解决了传统残差放大器在高带宽和线性度设计上的瓶颈。

💡 主要创新点

• 首次在高速ADC中大规模使用环形放大器（36个），实现高带宽和线性度。
• 通过背景失真监测技术，在不影响正常工作的前提下实时优化线性度。
• 在16nm工艺下实现了3.2GS/s采样率、61.7dB SNDR和19.2fJ/conv-step的Walden FoM。

🏷 关键词

📄 原文摘要

direct-RF sampling all rely on some form of residue amplification to minimize the number of interleaved channels and meet demanding specifications. Despite architectural efforts to reduce the total number of amplifiers in the system, the challenges associated with designing them for high bandwidth and linearity has limited reported power efficiencies [1]. In this work, we show that ring amplification [2] can overcome this longstanding bottleneck. In an architecture using 36 ringamps, the 3.2GS/s ADC consuming 61.3mW has a Nyquist SNDR of 61.7dB, SFDR of 73.3dB, Walden FoM of 19.2fJ/conv-step, and Schreier FoM of 165.9dB. Furthermore, we demonstrate a general technique whereby the signalto-distortion ratio (SDR) of any amplifier in the system can be independently

👥 作者与机构

Benjamin Hershberg, Davide Dermit, Barend van Liempd,

Ewout Martens, Nereo Markulic, Jorge Lagos, Jan Craninckx imec, Leuven, Belgium Giga-sample ADCs targeting high performance communication applications such as