⚡ 本页包含 AI 生成的分析内容,仅供参考
该论文提出了一种0.6V供电的13位20MS/s两步TDC辅助SAR ADC,通过将残差电压量化从电压域转换到时间域,解决了低压下头空间不足的问题。同时引入了PVT跟踪和速度增强技术,提升了电路鲁棒性和转换速度。
Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 The two-step SAR ADC is an energy-efficient architecture for high-resolution applications, which faces headroom challenges from the voltage-domain residue amplification under a low power supply. A TDC-assisted SAR ADC [1] uses a voltage-to-time converter (VTC) and a TDC as the back-end to quantize the residue voltage of the SAR ADC, which is attractive to the low power supply scenarios by moving the voltage domain quantization of a two-step SAR ADC into the time domain. However, the TDC-assisted SAR ADC encounters several design challenges. For example, it is sensitive to PVT variations due to partial timedomain operation, and its conversion speed is limited significantly by the long VTC latency when there is a small residue input voltage. This paper presents both PVT tracking and speed enhancement techniques for a 13b two-step TDC-assisted
Minglei Zhang1, Chi-Hang Chan1, Yan Zhu1, Rui P. Martins1,2
University of Macau, Macau, China