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ISSCC 2019Session 6 · ULTRA-HIGH-SPEED WIRELINEWireline I/O40nm CMOS

A 112Gb/s PAM-4 Voltage-Mode Transmitter with 4-Tap Two-Step FFE and Automatic Phase Alignment Techniques in 40nm CMOS

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📋 论文概要

该论文提出了一种在40nm CMOS工艺下实现的112Gb/s PAM-4电压模式发射机,通过两步前馈均衡(FFE)和自动相位对齐技术,有效提升了输出带宽并降低了功耗。在28GHz下5.5dB信道损耗时实现了高质量眼图,能效为3.89pJ/b。

💡 主要创新点

核心指标
112Gb/s, 3.89pJ/b, 5.5dB loss @ 28GHz
工艺节点
40nm CMOS
重要性
发表年份
ISSCC 2019

🏷 关键词

PAM-4电压模式发射机前馈均衡自动相位对齐112Gb/s

📄 原文摘要

transmitters to operate at higher speeds. The applications of 400GbE also push the transmitter to be designed at 112Gb/s for a single lane [1-2]. However, the use of advanced processes (<16nm) hardly reduces the costs. This paper presents a 112Gb/s PAM-4 voltage-mode transmitter fabricated in 40nm CMOS by using the proposed two-step FFE and the automatic phase alignment techniques, improving the output bandwidth as well as the power dissipation. It delivers high-quality eye diagrams under 5.5dB loss at 28GHz with 3.89pJ/b efficiency. The PAM-4 transmitters with voltage-mode drivers have been used in recent years due to their low power and high linearity characteristics [2-5]. Compared to NRZ signaling, the PAM-4 signals are more sensitive to ISI due to the reduction of the

👥 作者与机构

Pen-Jui Peng1, Yan-Ting Chen1, Sheng-Tsung Lai1, Chao-Hsuan Chen1,

Hsiang-En Huang1, Ted Shih2 Yuan Ze University, Taoyuan City, Taiwan Teletrx, Taipei, Taiwan 1 2 The continuous development of wireline communication encourages

分类:Wireline I/O · 年份:ISSCC 2019