A 22nm 1Mb 1024b-Read and Near-Memory-Computing Dual-Mode STT-MRAM Macro with 42.6GB/s Read Bandwidth for Security-Aware Mobile Devices

📋 论文概要

该论文提出了一种22nm工艺的1Mb STT-MRAM宏，支持1024位宽读取和近内存计算双模式，实现了42.6GB/s的高读取带宽，解决了安全感知移动设备对非易失性存储器高带宽和加密运算的需求。

💡 主要创新点

• 提出双模式操作：宽位读取模式和近内存计算模式，兼顾高带宽和加密算法加速。
• 采用小偏移感测放大器设计，克服STT-MRAM在先进工艺下TMR小导致的读取可靠性问题。

🏷 关键词

📄 原文摘要

Kuang-Tang Chang, Cheng-Xin Xue, Ssu-Yen Wu, Hui-Yao Kao, Peng Chen, Hsiao-Yu Huang, Shih-Hsih Teng, Meng-Fan Chang National Tsing Hua University, Hsinchu, Taiwan Many security-aware mobile devices, using the secure hash algorithm (SHA) or the advanced encryption standard (AES) for data encryption, require short readaccess time (tAC) and wide-IO from nonvolatile memory (NVM) for high-read bandwidth and SHA/AES shift/rotate functions. STT-MRAM is the major on-chip NVM for advanced process nodes[2-6]; however, it requires small-offset sense amplifiers (SAs) for robust reads, against a small TMR-ratio, at the expense of large area overhead and read energy (ERD). As Fig."13.4.1 shows, designing STTMRAM macros for security-related applications imposes three main challenges. (1) Using a large number of SAs for wide parallel-IO readout to achieve a short tAC, but this results in a high peak current (IPEAK) and a large area overhead. Using

👥 作者与机构

Tung-Cheng Chang, Yen-Cheng Chiu, Chun-Ying Lee, Je-Min Hung,