A 65nm Computing-in-Memory-Based CNN Processor with 2.9-to-35.8TOPS/W System Energy Efficiency Using Dynamic-Sparsity Performance-Scaling Architecture and Energy-Efficient Inter/Intra-Macro Data Reuse

📋 论文概要

提出了一种基于65nm计算内存（CIM）的CNN处理器，通过动态稀疏性优化技术实现系统级能效提升。解决了先前CIM工作仅关注宏单元而缺乏系统集成和稀疏优化的问题，实现了2.9至35.8 TOPS/W的宽范围系统能效。

💡 主要创新点

• 首次在CIM处理器中系统地探索稀疏优化，通过动态稀疏性技术提高能量效率。
• 实现了CIM宏单元与处理器其余部分的系统级集成，克服了直接映射稀疏模型到常规CIM宏的低效问题。
• 设计了能够根据稀疏性动态调整工作模式的架构，从而实现宽范围的高能效（2.9-35.8 TOPS/W）。

🏷 关键词

📄 原文摘要

University, Hsinchu, Taiwan 1 2 Computing-in-Memory (CIM) is a promising solution for energy-efficient neural network (NN) processors. Previous CIM chips [1-4] mainly focus on the memory macro itself, lacking insight on the overall system integration. Recently, a CIMbased system processor [5] for speech recognition demonstrated promising energy efficiency. No prior work systematically explores sparsity optimization for a CIM processor. Directly mapping sparse NN models onto regular CIM macros is ineffective, since sparse data is usually randomly distributed and CIM macros cannot be power gated even when many zeros exist. For a high compression rate and high efficiency, the granularity of sparsity [6] needs to be explored based on

👥 作者与机构

Jinshan Yue1,2, Zhe Yuan1,2, Xiaoyu Feng1, Yifan He1, Zhixiao Zhang3,

Xin Si3, Ruhui Liu3, Meng-Fan Chang3, Xueqing Li1, Huazhong Yang1, Yongpan Liu1 Tsinghua University, Beijing, China Pi2star Technology, Beijing, China 3 National Tsing Hua