A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips

📋 论文概要

本文提出了一款基于28nm工艺的64Kb存算一体宏，采用6T SRAM单元实现了双向转置多比特计算，同时支持推理和训练操作，旨在为AI边缘设备提供高能效和快速计算能力。

💡 主要创新点

• 首次在6T SRAM存算一体宏中实现双向转置操作，支持推理和训练两种模式，提高了计算灵活性。
• 采用多比特计算架构，在保持面积效率的同时提升了计算精度，适用于边缘AI场景。

🏷 关键词

📄 原文摘要

Wei-Hsing Huang1, Yung-Ning Tu1, Ruhui Liu1, Pei-Jung Lu1, Ta-Wei Liu1, Jing-Hong Wang1, Zhixiao Zhang1, Hongwu Jiang3, Shanshi Huang3, Chung-Chuan Lo1, Ren-Shuo Liu1, Chih-Cheng Hsieh1, Kea-Tiong Tang1, Shyh-Shyuan Sheu2, Sih-Han Li2, Heng-Yuan Lee2, Shih-Chieh Chang2, Shimeng Yu3, Meng-Fan Chang1 National Tsing Hua University, Hsinchu, Taiwan Industrial Technology Research Institute, Hsinchu, Taiwan 3 Georgia Institute of Technology, Atlanta, GA 1 2 Many AI edge devices require local intelligence to achieve fast computing time (tAC), high energy efficiency (EF), and privacy. The transfer-learning approach is a popular solution for AI edge chips, wherein data used to re-train the AI in the cloud is used to fine-tune (re-train) a few of the neural layers in edge devices. This enables the dynamic incorporation of data from in-situ environments or private information. Computing-in-memory (CIM) is a promising approach to

👥 作者与机构

Jian-Wei Su1,2, Xin Si1, Yen-Chi Chou1, Ting-Wei Chang1,