An 800MHz-BW VCO-Based Continuous-Time Pipelined ADC with Inherent Anti-Aliasing and On-Chip Digital Reconstruction Filter

📋 论文概要

该论文提出了一种基于VCO的连续时间流水线ADC，具有800MHz带宽和固有的抗混叠特性，并集成了片上数字重建滤波器，解决了宽带无线通信系统中高带宽、高线性度ADC的设计难题。

💡 主要创新点

• 提出VCO-based连续时间流水线架构，利用VCO的相位域量化实现高带宽和抗混叠。
• 集成片上数字重建滤波器，无需外部抗混叠滤波器，降低系统复杂度。
• 通过多级VCO和数字校准技术，在800MHz带宽内实现高线性度。

🏷 关键词

📄 原文摘要

Donald Paterson4, Asha Ganesan1, Yunzhi Dong4, Wenhua Yang4, Yue"Yin1, Zhao Li1, Prawal Shrestha4, Athreya Gopal5, Aathreya Bhat4, Shanthi Pavan6 Analog Devices, Toronto, Canada, 2Analog Devices, San Diego, CA Analog Devices, Somerset, NJ, 4Analog Devices, Wilmington, MA 5 Analog Devices, Greensboro, NC 6 Indian Institute of Technology Madras, Chennai, India 1 3 Modern wireless communication systems operating at tens of GHz have opened a near-GHz contiguous RF BW for various applications. Further, spectral efficiency has often necessitated such applications to use MIMO and beamforming, resulting in systems that are highly integrated and require tight power budgets. The ADC, being an indispensable element of these systems, has been thus pushed to digitize ever-increasing BWs (>500MHz) with low power dissipation and area, in an integration-friendly manner. Continuous-time (CT) ∆Σ ADCs have traditionally

👥 作者与机构

Hajime Shibata1, Gerry Taylor2, Bob Schell3, Victor Kozlov1, Sharvil Patil1,