Zen 2: The AMD 7nm Energy-Efficient High-Performance x86-64 Microprocessor Core

📋 论文概要

本文介绍了AMD Zen 2微处理器核心，采用TSMC 7nm FinFET工艺，实现了475M晶体管、7.83mm²的核心面积，并包含0.5MB L2缓存和4MB共享L3缓存。通过新的定制电路和内存设计技术，在提升性能的同时降低了功耗，相比上一代Zen实现了15%的指令每时钟周期（IPC）提升。

💡 主要创新点

• 采用7nm FinFET工艺，集成475M晶体管于7.83mm²核心面积，优化能效比。
• 引入新的定制电路和内存设计技术，在不增加功耗的前提下提升性能。
• 通过微架构改进实现15%的IPC提升，并支持多市场应用。

🏷 关键词

📄 原文摘要

design, fabricated in an energy-efficient TSMC 7nm FinFET process. Similar to AMD’s prior-generation core, codenamed “Zen” [1], the Core Complex Unit (CCX) with 4 cores in this version (Fig. 2.1.1) is used across a wide array of client, semicustom, embedded, and server market segments. A 475M-transistor core slice is 7.83mm2 with a 0.5MB L2 cache and 4MB of shared L3 cache. The design uses new custom circuits and memory design techniques to achieve the specified performance and power. The Zen 2 design has numerous design improvements over Zen (Fig. 2.1.2), including a 15% instructions-per-cycle (IPC) improvement on an average singlethreaded application, while reducing the technology-neutral switched capacitance-per-cycle (CAC) by 9%. The front end adopts a new branch-prediction

👥 作者与机构

Teja Singh1, Sundar Rangarajan1, Deepesh John1, Russell Schreiber1,

Spence Oliver1, Rajit Seahra2, Alex Schaefer1 AMD, Austin, TX, 2AMD, Markham, ON, Canada 1 Codenamed “Zen 2”, the AMD next-generation, high-efficiency core is an x86-64