A 7nm High-Performance and Energy-Efficient Mobile Application Processor with Tri-Cluster CPUs and a Sparsity-Aware NPU

📋 论文概要

该论文介绍了一款采用7nm工艺的高性能、高能效移动应用处理器，通过三丛集CPU架构、稀疏感知NPU和硬件自动时钟门控技术，实现了高性能与低功耗的平衡。

💡 主要创新点

• 采用三丛集CPU架构，根据任务负载动态调整核数，优化能效比。
• 引入稀疏感知NPU，利用权重稀疏性减少计算量和存储访问，提升神经网络处理效率。
• 硬件自动时钟门控（HWACG）特性，动态关闭空闲模块时钟，降低静态功耗。

🏷 关键词

📄 原文摘要

Jae Geun Song, Jinook Song, Hyeokman Kwon, Jaeyoung Lee, Jaesu Jung, Myungjin Kang, Jaehun Jeong, Yoonjoo Kwon, Nak Hee Seong Samsung Electronics, Hwaseong, Korea Mobile application processors (APs) must be extremely power efficient, while providing high performance for improved user experiences, higher graphicrendering performance, fancy camera operations, faster data communication, as well as longer battery life [1-3]. In this paper, we introduce a power-efficient highperformance 7nm ExynosTM AP processor with tri-cluster CPUs, a sparsity-aware NPU, and a HW auto-clock gating (HWACG) feature. Our new Exynos AP integrates eight CPU cores consisting of three different classes for better power/performance coverage. The big CPU is our 4th generation custom core, which improves architectural performance by 23% at the same frequency compared to previous work [4]. It maintains a 6-wide superscalar

👥 作者与机构

Young Duk Kim, Wookyeong Jeong, Lakkyung Jung, Dongsuk Shin,