⚡ 本页包含 AI 生成的分析内容，仅供参考
该论文提出了一种基于边缘追逐量化器的数字LDO，在65nm工艺中实现了4.58ps的FoM和抗侧信道攻击特性。通过新型量化器设计解决了传统同步DLDO响应慢和功耗大的问题，同时增强了安全性。
Low-Dropout Regulators (LDOs) are commonly desired for fine-grained power management in SoCs because of their compact area, high current efficiency, and small output ripple. Digital LDOs (DLDOs) are increasingly adopted in recent years thanks to voltage and process scalability. However, achieving a fast response to a load change requires a conventional synchronous DLDO to either increase its sampling frequency with a large power overhead, or include a large output capacitor (COUT) with increased chip area and cost. Various control schemes have been proposed to mitigate these drawbacks. In synchronous designs, attempts have been made to employ more complex control algorithms to achieve faster response [1], and to replace the PMOS switch array with switched capacitors for reduced dynamic energy consumption [2]. On the other hand, asynchronous DLDOs with event-driven [3] and beat-frequency VCO-based structures [4] show
Yan He, Kaiyuan Yang
Rice University, Houston, TX