← 返回论文列表 📄 下载原文 PDF  ISSCC 2020 · 25.6
ISSCC 2020Session 25 · DIGITAL POWER DELIVERY & CLOCKING CIRCUITSDigital Circuits

A 5.25GHz Subsampling PLL with a VCO-Phase-Noise Suppression Technique are generated from the reference frequency, to perform a frequency-shaping SSPD, the associated switch size needs to be minimized to avoid additional spurs at the output.

📄 原文摘要

These PLLs exhibit features like small area, large tuning range, and multiple output phases. However, their jitter performance is worse than that in LC-oscillator-based PLLs. Although a wider PLL bandwidth can reduce the RO phase noise, it is also limited to one-tenth of the reference frequency due to loop stability. To overcome the VCO noise, injection-locked PLLs (IL-PLLs) were proposed to extend the loop bandwidth to 0.4fREF but suffered from large spurious tones. On the other hand, phase-noise filter (PNF) was proposed recently to suppress noise. In most PNFs [1-3], voltage-controlled delay lines (VCDLs) are widely used to extract the error information and suppress the output phase noise. [1] utilizes a large VCDL to yield a more effective noise transfer function (NTF). However, it

👥 作者与机构

Hsiu-Hsien Ting, Tai-Cheng Lee, Figure 25.6.3 shows the linear model and open-loop gain comparison. The openloop gain of this system can be expressed as:

National Taiwan University, Taipei, Taiwan Ring-oscillator (RO)-based PLLs are preferred in many applications

分类:Digital Circuits · 年份:ISSCC 2020