Time-Borrowing Fast Mux-D Scan Flip-Flop with On-Chip Timing/Power/VMIN Characterization Circuits in 10nm CMOS

📋 论文概要

该论文提出了一种时间借用快速Mux-D扫描触发器，并集成了片上时序、功率和VMIN表征电路，旨在解决高性能微处理器中因工艺变化和时钟偏移导致的异常最大延迟路径问题。采用10nm CMOS工艺实现。

💡 主要创新点

• 提出了一种时间借用快速Mux-D扫描触发器，能够有效修复异常最大延迟路径，减少工艺变化和时钟偏移的影响。
• 集成了片上时序、功率和VMIN表征电路，实现了对触发器性能的实时监测和优化。
• 在10nm先进CMOS工艺中实现，展示了高频率和低功耗的潜力。

🏷 关键词

📄 原文摘要

Gregory Chen1, Monodeep Kar1, Raghavan Kumar1, Huseyin Sumbul1, Phil Knag1, Himanshu Kaul1, Sanu Mathew1, Mahesh Kumashikar2, Ram Krishnamurthy1, Vivek De1 Intel, Hillsboro, OR Intel, Bangalore, India 1 2 Flip-flops (FFs) are key building blocks in high-performance microprocessors, discrete graphics, and hardware accelerators [1-3], where pushing frequency has become increasingly critical due to emerging applications, such as AI, machine learning, autonomous driving and security. Time-borrowing (TB) FFs enable a means to fix outlier max-delay paths by reducing process variation and clock skew/jitter margins, resulting in higher frequency operation [4]. However, use of TB FFs is challenging due to higher power cost and lack of area compatibility with conventional FFs for post-placement insertion. Furthermore, increased design complexity require FFs with scan circuits, utilizing either level-sensitive scan

👥 作者与机构

Amit Agarwal1, Steven Hsu1, Simeon Realov1, Mark Anders1,