Non-Magnetic 0.18µm SOI Circulator with Multi-Watt Power Handling Based on Switched-Capacitor Clock Boosting

📋 论文概要

本文提出一种基于开关电容时钟升压技术的非磁性0.18µm SOI环形器，实现了多瓦功率处理能力。通过三项创新，解决了集成环形器在功率处理、插入损耗和面积上的瓶颈。

💡 主要创新点

• 开关电容时钟升压方案，提升功率处理能力。
• 高布拉格频率准分布式传输线结构，降低插入损耗。
• 优化线性周期时变电路设计，减少时钟功耗和芯片面积。

🏷 关键词

📄 原文摘要

There has been significant recent progress in the implementation of integrated non-reciprocal components based on linear periodically-time-varying (LPTV) circuits [1-5]. Nevertheless, integrated circulators still require a leap forward in power handling, clock power consumption, insertion loss (IL), and chip area to become compelling when compared with ferrite circulators or integrated reciprocal alternatives, such as the electrical-balance duplexer (EBD) [6]. This paper introduces three innovations – (i) a switched-capacitor clock-boosting scheme, (ii) high-Bragg-frequency quasi-distributed T-lines based on periodically loaded inductors, and (iii) a gyrator based on switched partially reflecting T-lines – that enable such a leap for integrated circulators and for LPTV circuits more broadly. These are showcased in a 1GHz 0.18µm SOI CMOS circulator that exhibits 2.1/2.6dB TX-ANT/ANT-RX IL (0.3dB better than prior art [4]), +34dBm

👥 作者与机构

Aravind Nagulu, Tingjun Chen, Gil Zussman, Harish Krishnaswamy

Columbia University, New York, NY