A 6.4-to-32Gb/s 0.96pJ/b Referenceless CDR Employing ML-Inspired Stochastic Phase-Frequency Detection Technique in 40nm CMOS

📋 论文概要

该论文提出了一种基于机器学习启发的随机鉴频鉴相技术的参考less时钟数据恢复电路，实现了6.4至32Gb/s的宽范围操作和0.96pJ/b的低功耗，解决了传统频率检测技术中捕获范围、锁定时间和功耗之间的性能权衡问题。

💡 主要创新点

• 提出了一种机器学习启发的随机鉴频鉴相技术，利用随机性进行频率检测，减少了硬件和功耗开销。
• 实现了连续速率参考less操作，覆盖6.4至32Gb/s的宽数据率范围，同时保持低功耗和高能效。

🏷 关键词

📄 原文摘要

Continuous-rate referenceless clock and data recovery (CDR) circuits are capable of operating over a wide range of data rates in multiple standards. To achieve wide-range operation without an external reference clock, several frequency detection techniques are presented [1-5]. However, most of the previous techniques require considerable hardware and power overhead to obtain information for frequency detection. It leads to a performance tradeoff between capture range, lock time, and power consumption. As well as the performance aspects, they rarely address significant concerns such as compatibility with the conventional CDR architecture, transition from phase locking to frequency locking, and harmonic locking. In this work, a referenceless CDR employing a stochastic phase-frequency detection technique is proposed. While the proposed CDR architecture is almost similar to the conventional bang-bang CDR, it achieves an

👥 作者与机构

Kwanseo Park, Minkyo Shim, Han-Gon Ko, Deog-Kyoon Jeong

Seoul National University, Seoul, Korea