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ISSCC 2020Session 6 · ULTRA-HIGH-SPEED WIRELINEWireline I/O40nm CMOS

A 100Gb/s NRZ Transmitter with 8-Tap FFE Using a 7b DAC in 40nm CMOS

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📋 论文概要

该论文提出了一种采用7位DAC和8抽头FFE的100Gb/s NRZ发射机,在40nm CMOS工艺中实现,解决了超短距离互连中高输出摆幅和更好信噪比的需求。通过DAC架构实现高分辨率FFE系数,最终输出眼图幅度达73mV。

💡 主要创新点

核心指标
100Gb/s NRZ, 73mV眼图幅度
工艺节点
40nm CMOS
重要性
发表年份
ISSCC 2020

🏷 关键词

NRZ发射机DACFFE40nm CMOS100Gb/s

📄 原文摘要

satisfy the continuously growing demands for wireline communications [1-5]. Although PAM-4 signaling performs two-fold bandwidth efficiency compared with the NRZ counterpart, the NRZ signal still has the advantage in low-loss scenarios like ultra-short-reach (USR) interconnection for optical engines due to its high output swing and better SNR. This paper presents a 100Gb/s NRZ transmitter fabricated in 40nm CMOS by incorporating a 7b DAC with an 8-tap FFE implemented in DSP. The DAC-based architecture demonstrates high resolution for FFE coefficients, achieving an output eye diagram with 73mV eye height and 760fsrms jitter under 7.1dB loss at 50GHz while consuming 619mW of power from 1.1V/1.2V/1.5V supplies. Figure 6.8.1 illustrates the transmitter architecture with quarter-rate structure for

👥 作者与机构

Pen-Jui Peng1, Sheng-Tsung Lai1, Wei-Hung Wang1, Chiang-Wei Lin1,

Wei-Chien Huang1, Ted Shih2 Yuan Ze University, Taoyuan, Taiwan 2 Teletrx, Taipei, Taiwan 1 Recently, PAM-4 transmitters have been realized at 112Gb/s or even faster to

分类:Wireline I/O · 年份:ISSCC 2020