A 3GHz ARM Neoverse N1 CPU in 7nm FinFET for Infrastructure Applications

📋 论文概要

本文介绍了ARM Neoverse N1 CPU，采用7nm FinFET工艺，主频3GHz，针对基础设施应用优化。该CPU基于ARM v8.2架构，相比前代Cortex-A72提升了性能和计算密度，旨在支持从IoT网关到数据中心服务器的可扩展计算平台。

💡 主要创新点

• 针对基础设施应用优化的微架构设计，平衡高性能与计算密度。
• 采用7nm FinFET工艺实现3GHz高频，提升能效比。
• 兼容ARM v8.2架构，支持可扩展的服务器级计算平台。

🏷 关键词

📄 原文摘要

Ketan Sawant3, Anitha Kona1, Rob Harrison3 ARM, Austin, TX ARM, Cambridge, United Kingdom 3 ARM, Sheffield, United Kingdom 4 ARM, Bangalore, India 1 2 The Neoverse family of Arm processors target a combination of high performance and compute density, enabling scalable computing platforms to power the internet infrastructure, from IoT gateways to datacentre servers. The first-generation CPU in the series (the N1) is an Arm Architecture v8.2 compliant CPU and a microarchitecture optimized for infrastructure applications [5]. Compared to the previous-generation core (Cortex-A72) [1], the N1 CPU provides 60% higher performance at the same frequency, and a 30% power efficiency gain in the same process technology (Fig. 8.3.1). The N1 Software Development Platform (N1 SDP) is a 7nm System-on-Chip (SoC) designed on TSMC 7FF process targeting 3GHz operation under 1V/TT/85°C. The N1 SDP SoC plot (Fig. 8.3.7) shows two clusters of dual Neoverse N1 CPUs, each

👥 作者与机构

Robert Christy1, Stuart Riches2, Sujil Kottekkat3, Prasanth Gopinath4,