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ISSCC 2020Session 9 · NOISE-SHAPING ADCsData Converters

A 2.56mW 40MHz-Bandwidth 75dB-SNDR PartialInterleaving SAR-Assisted NS Pipeline ADC With Background Inter-Stage Offset Calibration

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📋 论文概要

本文提出了一种部分交织SAR辅助噪声整形流水线ADC,通过背景级间偏移校准技术,在2.56mW功耗下实现了40MHz带宽和75dB SNDR,解决了现有NS-SAR混合架构在带宽和分辨率之间的权衡问题。

💡 主要创新点

核心指标
75dB SNDR @ 40MHz带宽, 2.56mW功耗
重要性
发表年份
ISSCC 2020

🏷 关键词

噪声整形部分交织SAR辅助流水线ADC背景校准低功耗

📄 原文摘要

Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 The noise-shaping SAR (NS-SAR) hybrid architecture has shown its potential in achieving tens of MHz bandwidth (BW) together with high resolution [1-2]. However, in [1], the performance is debilitated by the passive 1st-order NS, thus limiting the achievable SNDR below 70dB; while with an NS order as high as 4 for SNDR > 70dB based on the interleaving structure [2], power-hungry preamplifiers are essential for residue summation and low-noise targets, which in consequence restricts its Schreier FoM (FoMs) to 166dB. Whereas the 0-1 MASH SDM based on the pipeline-SAR structure retains an FoMs >$170dB [3], the speed of this single-channel ADC is confined by the 1st-stage with the BW of 12.5MHz, and its power-hungry residue amplifier (RA) occupies > 70% of the total ADC power. Besides, its inter-stage offset and gain mismatch are only

👥 作者与机构

Yan Song1, Yan Zhu1, Chi Hang Chan1, Rui Paulo Martins1,2

University of Macau, Macau, China

分类:Data Converters · 年份:ISSCC 2020