A 116µW 104.4dB-DR 100.6dB-SNDR CT ΔΣ Audio ADC Using Tri-Level Current-Steering DAC with Gate-Leakage Compensated Off-Transistor-Based Bias Noise Filter

📋 论文概要

本文提出了一种采用三电平电流舵DAC的连续时间ΔΣ音频ADC，通过门漏电流补偿技术实现了低功耗高性能。该ADC在116µW功耗下达到了104.4dB动态范围和100.6dB SNDR，解决了传统电阻DAC需要额外参考发生器且限制峰值SNDR的问题。

💡 主要创新点

• 采用三电平电流舵DAC取代传统电阻DAC，利用其固有高PSRR特性简化参考电路设计并降低功耗和面积。
• 引入门漏电流补偿技术，有效解决了先进工艺下DAC输出级的静态误差，保证了高精度线性度。
• 结合三电平实现与dump缓冲器，小输入信号时降低噪声，提升了动态范围。

🏷 关键词

📄 原文摘要

applications because of its high energy efficiency and driving-friendly front-end compared with its discrete time counterpart. A resistive DAC (R-DAC) is widely used for its intrinsic low flicker noise. However, the design of a high PSRR and low flicker noise reference generator for R-DAC not only consumes extra power and area with an external RC filter [1] but also limits the peak SNDR performance [2]. In contrast, a currentsteering DAC (I-DAC) has intrinsic PSRR. In addition, the use of a tri-level implementation with a dumped buffer reduces noise with a small input signal, which improves dynamic range (DR), but flicker noise from the bias circuit still limits the peak SNR of the ADC. Instead of using large-sized transistors or an off-chip RC filter for

👥 作者与机构

Chilun Lo, Jongmi Lee, Yong Lim, Younghyun Yoon, Hyunseok Hwang,

Jaehoon Lee, MooYeol Choi, Myungjin Lee, Seunghyun Oh, Jongwoo Lee Samsung Electronics, Hwaseong, Korea A continuous-time delta-sigma modulator (CT-DSM) ADC is commonly used in audio